What is NVIDIA Constellation?

Constellation is NVIDIA's new Taipei headquarters campus in the Beitou-Shilin district, built on a 50-year lease. Construction begins in June or July 2026 with full operations targeted for 2030, consolidating R&D, supply-chain, and engineering teams a short drive from TSMC Fab 18 and the CoWoS lines in Hsinchu and Chunan.

How much TSMC CoWoS capacity has NVIDIA locked up?

According to DIGITIMES, NVIDIA has pre-committed more than 50% of TSMC's CoWoS advanced-packaging capacity through 2027 — a stronger reservation than the roughly 45% NVIDIA held on the Blackwell window a year ago.

Why is CoWoS the bottleneck for AI chips?

CoWoS (Chip-on-Wafer-on-Substrate) is the 2.5D advanced-packaging process that bonds GPU compute dies to HBM stacks on a silicon interposer. With each new accelerator generation requiring larger interposers and more HBM stacks, CoWoS line capacity — not transistor density — now sets the ceiling on how many AI training clusters can ship.

Who could compete with TSMC on advanced packaging?

The only realistic near-term alternatives to TSMC CoWoS are Intel Foundry's EMIB-T and Samsung's I-Cube SoW. Neither is qualified at NVIDIA scale today, and bringing up a credible second packaging vendor for a flagship AI accelerator typically takes 18 to 24 months.

Packaging

NVIDIA Plants Flag in Taipei: Constellation HQ + CoWoS Lock

Q: How fast is Vera Rubin versus Blackwell?

NVIDIA rates the Vera Rubin NVL72 system at roughly 3.5x training and 5x inference performance versus Blackwell. Each Rubin package stacks more HBM4 dies on a larger silicon interposer than CoWoS-L can produce today, which is why packaging — not the logic node — is the binding constraint on supply.

June 1, 2026 | By SBN Media Studio | Taipei, Taiwan

NVIDIA Constellation Taipei headquarters campus rendering in the Beitou-Shilin district beside a TSMC CoWoS silicon interposer wafer and a Vera Rubin NVL72 rack silhouette

TAIPEI, JUNE 1, 2026. Ahead of Computex and GTC Taipei this week, NVIDIA chief executive Jensen Huang flew in to meet TSMC chairman C.C. Wei and lock down CoWoS advanced-packaging capacity for the Vera Rubin generation, while simultaneously unveiling Constellation, a 50-year-lease Taipei headquarters in the Beitou-Shilin district.

The dual move, reported by TechTimes and confirmed in NVIDIA's own Computex briefing, cements Taiwan as the company's center of gravity. Constellation breaks ground in June or July 2026 and is targeted for full operations by 2030, with NVIDIA planning to consolidate R&D, supply-chain, and engineering teams onto a single campus a short drive from TSMC Fab 18 and the CoWoS lines in Hsinchu and Chunan. The Wei meeting, per DIGITIMES, was used to pre-commit more than 50% of TSMC's CoWoS capacity through 2027 — a stronger reservation than the roughly 45% NVIDIA held on the equivalent Blackwell window a year ago.

The mechanism matters because CoWoS, not the logic node, is now the binding constraint on AI accelerator supply. Vera Rubin NVL72, which begins customer shipments in early 2027, is rated by NVIDIA at roughly 3.5x training and 5x inference performance versus Blackwell, but each Rubin package stacks more HBM4 dies on a larger silicon interposer than CoWoS-L can produce today. TSMC is mid-build on multiple new CoWoS-capable lines in Chunan, Chiayi, and Kaohsiung, and DIGITIMES reports the foundry has placed equipment orders sized specifically to NVIDIA's Rubin and Rubin Ultra ramp curves. Locking the slot now is what guarantees a customer ships in volume next year.

The consequences ripple in three directions. First, AMD, Broadcom, and the Chinese custom-silicon programs at Alibaba and Baidu will compete for the residual CoWoS pool — a pool that is now demonstrably smaller and more contested through 2027. Second, the Constellation lease is a political signal: NVIDIA is doubling down on Taiwan at exactly the moment Washington is pressing TSMC to push more advanced capacity to Arizona, and Huang has been explicit that Arizona output remains a complement, not a substitute, for the Hsinchu-Chunan corridor. Third, the campus itself becomes a strategic recruitment tool against MediaTek, Realtek, and a resurgent Intel design office that have been competing for the same Taiwanese semiconductor talent pool.

The takeaway for the rest of 2026 is straightforward: CoWoS capacity, not GPU die yield, is the variable that will set the ceiling on AI training-cluster builds for the next eighteen months. With NVIDIA having locked the majority of that capacity through 2027 and broken ground on a Taipei campus designed to keep it close to the source, the next move in the AI hardware race belongs to whoever can either secure a credible second packaging vendor — Intel Foundry's EMIB-T and Samsung's I-Cube SoW are the only realistic candidates — or design around the constraint entirely. Neither path is fast. Taipei is winning the decade.